This invention relates to a non-contacting electro-optical technique and a system based thereon for inspecting printed circuit boards.
The use of printed circuit boards for mounting and connecting electronic circuits and components is now commonplace in the electronics industry. The printed circuit board, however fabricated, consists fundamentally of an insulating or non-conducting medium normally in the form of a plastic sheet for supporting conductors which are dispersed on or through this medium to provide interconnections between the electronic components and circuits which are to be mounted on the board.
The usual practice is to provide a series of holes through the board for the electrical connections to the components or circuits which are to be supported thereon. These holes are electrically interconnected by the conducting paths so that the components and/or circuits mounted on the printed circuit board are properly interconnected electrically.
The most common procedure for manufacturing such printed circuit boards results in the conductive material being formed on one or both surfaces of the insulating sheet, the material being generally in a color which is highly contrasting to that of the sheet upon whose surface it is mounted.
In many cases, several such sheets of insulating material with conductors formed on their surfaces are laminated together to create the final circuit board. However, in the manufacturing procedure there is always some stage at which the individual layers or sheets are available for inspection before they are bonded to additional layers to form the final printed circuit board package.
There are currently two procedures in widespread use to carry out inspection of printed circuit boards. One is simple and direct visual inspection of each of the conductive patterns which is visible on its insulating substrate. The second method makes use of a set of contacts known in the trade as "a bed of nails," these contacts being deployed to engage test points or holes on the board being inspected. These contacts in the set are connected to a suitably programmed computer to insure that those accessible test points or holes in the printed circuit board which should be interconnected are actually interconnected, and those which should be isolated are in fact isolated.
Existing inspection procedures have certain disadvantages. To begin with, visual inspection is time-consuming and quite expensive. Moreover, it depends upon visual acuity and alertness on the part of an operator. Visual inspection becomes more difficult to carry out with the increasing density and complexity of the conductive pattern on the printed circuit board. And since the development of printed circuits is now in the direction of conductor line widths and line spacing appreciably below 0.010", and is rapidly approaching 0.005" and even smaller, visual inspection at this level is difficult if not impossible to perform in a viable manner.
The "bed of nails" approach suffers from two major drawbacks; the first being the high cost of the fixturing which has to be specially configured to each board. The second is that it is strictly a GO-NO/GO test and affords no indication of the quality of the interconnections between the points being tested.
In particular, the "bed of nails" test cannot determine, in commercial configurations available today, whether the interconnections are made by conductors of proper width, or whether the interconnections are effected by marginally narrow conductor lines. Similarly, one cannot determine whether the spacing between conductive paths is minimal with a high probability of undesirable leakage between these conductors and the subsequent development under field conditions of an actual short, or whether the spacing is at the value assigned by the design engineer for the requisite reliability of the system for which the printed circuit board is intended.